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Initial Commit
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624
thirdparty/capstone/suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBuilder.h
vendored
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624
thirdparty/capstone/suite/synctools/tablegen/include/llvm/CodeGen/MachineInstrBuilder.h
vendored
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@@ -0,0 +1,624 @@
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//===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file exposes a function named BuildMI, which is useful for dramatically
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// simplifying how MachineInstr's are created. It allows use of code like this:
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//
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// M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst)
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// .addReg(argVal1)
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// .addReg(argVal2);
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/CodeGen/GlobalISel/Utils.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBundle.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/IR/InstrTypes.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <cassert>
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#include <cstdint>
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namespace llvm {
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class MCInstrDesc;
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class MDNode;
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namespace RegState {
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enum {
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/// Register definition.
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Define = 0x2,
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/// Not emitted register (e.g. carry, or temporary result).
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Implicit = 0x4,
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/// The last use of a register.
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Kill = 0x8,
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/// Unused definition.
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Dead = 0x10,
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/// Value of the register doesn't matter.
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Undef = 0x20,
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/// Register definition happens before uses.
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EarlyClobber = 0x40,
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/// Register 'use' is for debugging purpose.
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Debug = 0x80,
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/// Register reads a value that is defined inside the same instruction or
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/// bundle.
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InternalRead = 0x100,
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/// Register that may be renamed.
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Renamable = 0x200,
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DefineNoRead = Define | Undef,
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ImplicitDefine = Implicit | Define,
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ImplicitKill = Implicit | Kill
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};
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} // end namespace RegState
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class MachineInstrBuilder {
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MachineFunction *MF = nullptr;
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MachineInstr *MI = nullptr;
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public:
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MachineInstrBuilder() = default;
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/// Create a MachineInstrBuilder for manipulating an existing instruction.
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/// F must be the machine function that was used to allocate I.
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MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
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MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
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: MF(&F), MI(&*I) {}
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/// Allow automatic conversion to the machine instruction we are working on.
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operator MachineInstr*() const { return MI; }
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MachineInstr *operator->() const { return MI; }
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operator MachineBasicBlock::iterator() const { return MI; }
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/// If conversion operators fail, use this method to get the MachineInstr
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/// explicitly.
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MachineInstr *getInstr() const { return MI; }
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/// Get the register for the operand index.
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/// The operand at the index should be a register (asserted by
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/// MachineOperand).
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Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); }
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/// Add a new virtual register operand.
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const MachineInstrBuilder &addReg(Register RegNo, unsigned flags = 0,
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unsigned SubReg = 0) const {
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assert((flags & 0x1) == 0 &&
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"Passing in 'true' to addReg is forbidden! Use enums instead.");
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MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
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flags & RegState::Define,
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flags & RegState::Implicit,
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flags & RegState::Kill,
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flags & RegState::Dead,
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flags & RegState::Undef,
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flags & RegState::EarlyClobber,
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SubReg,
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flags & RegState::Debug,
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flags & RegState::InternalRead,
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flags & RegState::Renamable));
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return *this;
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}
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/// Add a virtual register definition operand.
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const MachineInstrBuilder &addDef(Register RegNo, unsigned Flags = 0,
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unsigned SubReg = 0) const {
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return addReg(RegNo, Flags | RegState::Define, SubReg);
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}
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/// Add a virtual register use operand. It is an error for Flags to contain
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/// `RegState::Define` when calling this function.
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const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0,
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unsigned SubReg = 0) const {
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assert(!(Flags & RegState::Define) &&
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"Misleading addUse defines register, use addReg instead.");
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return addReg(RegNo, Flags, SubReg);
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}
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/// Add a new immediate operand.
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const MachineInstrBuilder &addImm(int64_t Val) const {
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MI->addOperand(*MF, MachineOperand::CreateImm(Val));
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return *this;
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}
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const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
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MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
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return *this;
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}
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const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
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MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
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return *this;
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}
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const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
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unsigned TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addFrameIndex(int Idx) const {
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MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
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return *this;
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}
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const MachineInstrBuilder &
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addConstantPoolIndex(unsigned Idx, int Offset = 0,
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unsigned TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
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unsigned TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
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TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
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unsigned TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
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int64_t Offset = 0,
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unsigned TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addExternalSymbol(const char *FnName,
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unsigned TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA,
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int64_t Offset = 0,
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unsigned TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
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MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
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return *this;
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}
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const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
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MI->addMemOperand(*MF, MMO);
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return *this;
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}
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const MachineInstrBuilder &
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setMemRefs(ArrayRef<MachineMemOperand *> MMOs) const {
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MI->setMemRefs(*MF, MMOs);
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return *this;
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}
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const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
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MI->cloneMemRefs(*MF, OtherMI);
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return *this;
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}
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const MachineInstrBuilder &
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cloneMergedMemRefs(ArrayRef<const MachineInstr *> OtherMIs) const {
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MI->cloneMergedMemRefs(*MF, OtherMIs);
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return *this;
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}
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const MachineInstrBuilder &add(const MachineOperand &MO) const {
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MI->addOperand(*MF, MO);
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return *this;
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}
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const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const {
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for (const MachineOperand &MO : MOs) {
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MI->addOperand(*MF, MO);
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}
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return *this;
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}
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const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
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MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
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assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
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: true) &&
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"first MDNode argument of a DBG_VALUE not a variable");
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assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
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: true) &&
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"first MDNode argument of a DBG_LABEL not a label");
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return *this;
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}
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const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
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MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
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return *this;
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}
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const MachineInstrBuilder &addIntrinsicID(Intrinsic::ID ID) const {
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MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID));
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return *this;
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}
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const MachineInstrBuilder &addPredicate(CmpInst::Predicate Pred) const {
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MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred));
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return *this;
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}
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const MachineInstrBuilder &addShuffleMask(ArrayRef<int> Val) const {
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MI->addOperand(*MF, MachineOperand::CreateShuffleMask(Val));
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return *this;
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}
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const MachineInstrBuilder &addSym(MCSymbol *Sym,
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unsigned char TargetFlags = 0) const {
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MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
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return *this;
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}
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const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
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MI->setFlags(Flags);
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return *this;
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}
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const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
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MI->setFlag(Flag);
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return *this;
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}
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// Add a displacement from an existing MachineOperand with an added offset.
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const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
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unsigned char TargetFlags = 0) const {
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// If caller specifies new TargetFlags then use it, otherwise the
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// default behavior is to copy the target flags from the existing
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// MachineOperand. This means if the caller wants to clear the
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// target flags it needs to do so explicitly.
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if (0 == TargetFlags)
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TargetFlags = Disp.getTargetFlags();
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switch (Disp.getType()) {
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default:
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llvm_unreachable("Unhandled operand type in addDisp()");
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case MachineOperand::MO_Immediate:
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return addImm(Disp.getImm() + off);
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case MachineOperand::MO_ConstantPoolIndex:
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return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
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||||
TargetFlags);
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||||
case MachineOperand::MO_GlobalAddress:
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||||
return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
|
||||
TargetFlags);
|
||||
case MachineOperand::MO_BlockAddress:
|
||||
return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
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||||
TargetFlags);
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||||
case MachineOperand::MO_JumpTableIndex:
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assert(off == 0 && "cannot create offset into jump tables");
|
||||
return addJumpTableIndex(Disp.getIndex(), TargetFlags);
|
||||
}
|
||||
}
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||||
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/// Copy all the implicit operands from OtherMI onto this one.
|
||||
const MachineInstrBuilder &
|
||||
copyImplicitOps(const MachineInstr &OtherMI) const {
|
||||
MI->copyImplicitOps(*MF, OtherMI);
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||||
return *this;
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||||
}
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||||
|
||||
bool constrainAllUses(const TargetInstrInfo &TII,
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||||
const TargetRegisterInfo &TRI,
|
||||
const RegisterBankInfo &RBI) const {
|
||||
return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
|
||||
}
|
||||
};
|
||||
|
||||
/// Builder interface. Specify how to create the initial instruction itself.
|
||||
inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
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||||
const MCInstrDesc &MCID) {
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||||
return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
|
||||
}
|
||||
|
||||
/// This version of the builder sets up the first operand as a
|
||||
/// destination virtual register.
|
||||
inline MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, Register DestReg) {
|
||||
return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
|
||||
.addReg(DestReg, RegState::Define);
|
||||
}
|
||||
|
||||
/// This version of the builder inserts the newly-built instruction before
|
||||
/// the given position in the given MachineBasicBlock, and sets up the first
|
||||
/// operand as a destination virtual register.
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::iterator I,
|
||||
const DebugLoc &DL, const MCInstrDesc &MCID,
|
||||
Register DestReg) {
|
||||
MachineFunction &MF = *BB.getParent();
|
||||
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
|
||||
BB.insert(I, MI);
|
||||
return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
|
||||
}
|
||||
|
||||
/// This version of the builder inserts the newly-built instruction before
|
||||
/// the given position in the given MachineBasicBlock, and sets up the first
|
||||
/// operand as a destination virtual register.
|
||||
///
|
||||
/// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
|
||||
/// added to the same bundle.
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::instr_iterator I,
|
||||
const DebugLoc &DL, const MCInstrDesc &MCID,
|
||||
Register DestReg) {
|
||||
MachineFunction &MF = *BB.getParent();
|
||||
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
|
||||
BB.insert(I, MI);
|
||||
return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
|
||||
}
|
||||
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
|
||||
const DebugLoc &DL, const MCInstrDesc &MCID,
|
||||
Register DestReg) {
|
||||
// Calling the overload for instr_iterator is always correct. However, the
|
||||
// definition is not available in headers, so inline the check.
|
||||
if (I.isInsideBundle())
|
||||
return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg);
|
||||
return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg);
|
||||
}
|
||||
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
|
||||
const DebugLoc &DL, const MCInstrDesc &MCID,
|
||||
Register DestReg) {
|
||||
return BuildMI(BB, *I, DL, MCID, DestReg);
|
||||
}
|
||||
|
||||
/// This version of the builder inserts the newly-built instruction before the
|
||||
/// given position in the given MachineBasicBlock, and does NOT take a
|
||||
/// destination register.
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::iterator I,
|
||||
const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID) {
|
||||
MachineFunction &MF = *BB.getParent();
|
||||
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
|
||||
BB.insert(I, MI);
|
||||
return MachineInstrBuilder(MF, MI);
|
||||
}
|
||||
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::instr_iterator I,
|
||||
const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID) {
|
||||
MachineFunction &MF = *BB.getParent();
|
||||
MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
|
||||
BB.insert(I, MI);
|
||||
return MachineInstrBuilder(MF, MI);
|
||||
}
|
||||
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
|
||||
const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID) {
|
||||
// Calling the overload for instr_iterator is always correct. However, the
|
||||
// definition is not available in headers, so inline the check.
|
||||
if (I.isInsideBundle())
|
||||
return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID);
|
||||
return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID);
|
||||
}
|
||||
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
|
||||
const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID) {
|
||||
return BuildMI(BB, *I, DL, MCID);
|
||||
}
|
||||
|
||||
/// This version of the builder inserts the newly-built instruction at the end
|
||||
/// of the given MachineBasicBlock, and does NOT take a destination register.
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID) {
|
||||
return BuildMI(*BB, BB->end(), DL, MCID);
|
||||
}
|
||||
|
||||
/// This version of the builder inserts the newly-built instruction at the
|
||||
/// end of the given MachineBasicBlock, and sets up the first operand as a
|
||||
/// destination virtual register.
|
||||
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, Register DestReg) {
|
||||
return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
|
||||
}
|
||||
|
||||
/// This version of the builder builds a DBG_VALUE intrinsic
|
||||
/// for either a value in a register or a register-indirect
|
||||
/// address. The convention is that a DBG_VALUE is indirect iff the
|
||||
/// second operand is an immediate.
|
||||
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, bool IsIndirect,
|
||||
Register Reg, const MDNode *Variable,
|
||||
const MDNode *Expr);
|
||||
|
||||
/// This version of the builder builds a DBG_VALUE intrinsic
|
||||
/// for a MachineOperand.
|
||||
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, bool IsIndirect,
|
||||
const MachineOperand &MO, const MDNode *Variable,
|
||||
const MDNode *Expr);
|
||||
|
||||
/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
|
||||
/// for a MachineOperand.
|
||||
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, bool IsIndirect,
|
||||
ArrayRef<MachineOperand> MOs,
|
||||
const MDNode *Variable, const MDNode *Expr);
|
||||
|
||||
/// This version of the builder builds a DBG_VALUE intrinsic
|
||||
/// for either a value in a register or a register-indirect
|
||||
/// address and inserts it at position I.
|
||||
MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::iterator I, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, bool IsIndirect,
|
||||
Register Reg, const MDNode *Variable,
|
||||
const MDNode *Expr);
|
||||
|
||||
/// This version of the builder builds a DBG_VALUE intrinsic
|
||||
/// for a machine operand and inserts it at position I.
|
||||
MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::iterator I, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, bool IsIndirect,
|
||||
MachineOperand &MO, const MDNode *Variable,
|
||||
const MDNode *Expr);
|
||||
|
||||
/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
|
||||
/// for a machine operand and inserts it at position I.
|
||||
MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::iterator I, const DebugLoc &DL,
|
||||
const MCInstrDesc &MCID, bool IsIndirect,
|
||||
ArrayRef<MachineOperand> MOs,
|
||||
const MDNode *Variable, const MDNode *Expr);
|
||||
|
||||
/// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
|
||||
MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
|
||||
MachineBasicBlock::iterator I,
|
||||
const MachineInstr &Orig, int FrameIndex,
|
||||
Register SpillReg);
|
||||
MachineInstr *
|
||||
buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I,
|
||||
const MachineInstr &Orig, int FrameIndex,
|
||||
SmallVectorImpl<const MachineOperand *> &SpilledOperands);
|
||||
|
||||
/// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
|
||||
/// modifying an instruction in place while iterating over a basic block.
|
||||
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg);
|
||||
|
||||
inline unsigned getDefRegState(bool B) {
|
||||
return B ? RegState::Define : 0;
|
||||
}
|
||||
inline unsigned getImplRegState(bool B) {
|
||||
return B ? RegState::Implicit : 0;
|
||||
}
|
||||
inline unsigned getKillRegState(bool B) {
|
||||
return B ? RegState::Kill : 0;
|
||||
}
|
||||
inline unsigned getDeadRegState(bool B) {
|
||||
return B ? RegState::Dead : 0;
|
||||
}
|
||||
inline unsigned getUndefRegState(bool B) {
|
||||
return B ? RegState::Undef : 0;
|
||||
}
|
||||
inline unsigned getInternalReadRegState(bool B) {
|
||||
return B ? RegState::InternalRead : 0;
|
||||
}
|
||||
inline unsigned getDebugRegState(bool B) {
|
||||
return B ? RegState::Debug : 0;
|
||||
}
|
||||
inline unsigned getRenamableRegState(bool B) {
|
||||
return B ? RegState::Renamable : 0;
|
||||
}
|
||||
|
||||
/// Get all register state flags from machine operand \p RegOp.
|
||||
inline unsigned getRegState(const MachineOperand &RegOp) {
|
||||
assert(RegOp.isReg() && "Not a register operand");
|
||||
return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) |
|
||||
getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) |
|
||||
getUndefRegState(RegOp.isUndef()) |
|
||||
getInternalReadRegState(RegOp.isInternalRead()) |
|
||||
getDebugRegState(RegOp.isDebug()) |
|
||||
getRenamableRegState(Register::isPhysicalRegister(RegOp.getReg()) &&
|
||||
RegOp.isRenamable());
|
||||
}
|
||||
|
||||
/// Helper class for constructing bundles of MachineInstrs.
|
||||
///
|
||||
/// MIBundleBuilder can create a bundle from scratch by inserting new
|
||||
/// MachineInstrs one at a time, or it can create a bundle from a sequence of
|
||||
/// existing MachineInstrs in a basic block.
|
||||
class MIBundleBuilder {
|
||||
MachineBasicBlock &MBB;
|
||||
MachineBasicBlock::instr_iterator Begin;
|
||||
MachineBasicBlock::instr_iterator End;
|
||||
|
||||
public:
|
||||
/// Create an MIBundleBuilder that inserts instructions into a new bundle in
|
||||
/// BB above the bundle or instruction at Pos.
|
||||
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
|
||||
: MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
|
||||
|
||||
/// Create a bundle from the sequence of instructions between B and E.
|
||||
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B,
|
||||
MachineBasicBlock::iterator E)
|
||||
: MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
|
||||
assert(B != E && "No instructions to bundle");
|
||||
++B;
|
||||
while (B != E) {
|
||||
MachineInstr &MI = *B;
|
||||
++B;
|
||||
MI.bundleWithPred();
|
||||
}
|
||||
}
|
||||
|
||||
/// Create an MIBundleBuilder representing an existing instruction or bundle
|
||||
/// that has MI as its head.
|
||||
explicit MIBundleBuilder(MachineInstr *MI)
|
||||
: MBB(*MI->getParent()), Begin(MI),
|
||||
End(getBundleEnd(MI->getIterator())) {}
|
||||
|
||||
/// Return a reference to the basic block containing this bundle.
|
||||
MachineBasicBlock &getMBB() const { return MBB; }
|
||||
|
||||
/// Return true if no instructions have been inserted in this bundle yet.
|
||||
/// Empty bundles aren't representable in a MachineBasicBlock.
|
||||
bool empty() const { return Begin == End; }
|
||||
|
||||
/// Return an iterator to the first bundled instruction.
|
||||
MachineBasicBlock::instr_iterator begin() const { return Begin; }
|
||||
|
||||
/// Return an iterator beyond the last bundled instruction.
|
||||
MachineBasicBlock::instr_iterator end() const { return End; }
|
||||
|
||||
/// Insert MI into this bundle before I which must point to an instruction in
|
||||
/// the bundle, or end().
|
||||
MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I,
|
||||
MachineInstr *MI) {
|
||||
MBB.insert(I, MI);
|
||||
if (I == Begin) {
|
||||
if (!empty())
|
||||
MI->bundleWithSucc();
|
||||
Begin = MI->getIterator();
|
||||
return *this;
|
||||
}
|
||||
if (I == End) {
|
||||
MI->bundleWithPred();
|
||||
return *this;
|
||||
}
|
||||
// MI was inserted in the middle of the bundle, so its neighbors' flags are
|
||||
// already fine. Update MI's bundle flags manually.
|
||||
MI->setFlag(MachineInstr::BundledPred);
|
||||
MI->setFlag(MachineInstr::BundledSucc);
|
||||
return *this;
|
||||
}
|
||||
|
||||
/// Insert MI into MBB by prepending it to the instructions in the bundle.
|
||||
/// MI will become the first instruction in the bundle.
|
||||
MIBundleBuilder &prepend(MachineInstr *MI) {
|
||||
return insert(begin(), MI);
|
||||
}
|
||||
|
||||
/// Insert MI into MBB by appending it to the instructions in the bundle.
|
||||
/// MI will become the last instruction in the bundle.
|
||||
MIBundleBuilder &append(MachineInstr *MI) {
|
||||
return insert(end(), MI);
|
||||
}
|
||||
};
|
||||
|
||||
} // end namespace llvm
|
||||
|
||||
#endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
|
||||
Reference in New Issue
Block a user