mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-12-10 14:14:58 +00:00
372 lines
6.6 KiB
Python
372 lines
6.6 KiB
Python
from . import CS_OP_INVALID, CS_OP_REG, CS_OP_IMM, CS_OP_FP, CS_OP_PRED, CS_OP_SPECIAL, CS_OP_MEM, CS_OP_MEM_REG, CS_OP_MEM_IMM, UINT16_MAX
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# For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sh_const.py]
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SH_REG_INVALID = 0
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SH_REG_R0 = 1
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SH_REG_R1 = 2
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SH_REG_R2 = 3
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SH_REG_R3 = 4
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SH_REG_R4 = 5
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SH_REG_R5 = 6
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SH_REG_R6 = 7
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SH_REG_R7 = 8
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SH_REG_R8 = 9
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SH_REG_R9 = 10
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SH_REG_R10 = 11
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SH_REG_R11 = 12
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SH_REG_R12 = 13
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SH_REG_R13 = 14
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SH_REG_R14 = 15
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SH_REG_R15 = 16
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SH_REG_R0_BANK = 17
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SH_REG_R1_BANK = 18
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SH_REG_R2_BANK = 19
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SH_REG_R3_BANK = 20
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SH_REG_R4_BANK = 21
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SH_REG_R5_BANK = 22
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SH_REG_R6_BANK = 23
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SH_REG_R7_BANK = 24
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SH_REG_FR0 = 25
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SH_REG_FR1 = 26
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SH_REG_FR2 = 27
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SH_REG_FR3 = 28
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SH_REG_FR4 = 29
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SH_REG_FR5 = 30
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SH_REG_FR6 = 31
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SH_REG_FR7 = 32
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SH_REG_FR8 = 33
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SH_REG_FR9 = 34
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SH_REG_FR10 = 35
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SH_REG_FR11 = 36
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SH_REG_FR12 = 37
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SH_REG_FR13 = 38
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SH_REG_FR14 = 39
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SH_REG_FR15 = 40
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SH_REG_DR0 = 41
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SH_REG_DR2 = 42
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SH_REG_DR4 = 43
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SH_REG_DR6 = 44
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SH_REG_DR8 = 45
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SH_REG_DR10 = 46
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SH_REG_DR12 = 47
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SH_REG_DR14 = 48
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SH_REG_XD0 = 49
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SH_REG_XD2 = 50
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SH_REG_XD4 = 51
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SH_REG_XD6 = 52
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SH_REG_XD8 = 53
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SH_REG_XD10 = 54
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SH_REG_XD12 = 55
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SH_REG_XD14 = 56
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SH_REG_XF0 = 57
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SH_REG_XF1 = 58
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SH_REG_XF2 = 59
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SH_REG_XF3 = 60
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SH_REG_XF4 = 61
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SH_REG_XF5 = 62
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SH_REG_XF6 = 63
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SH_REG_XF7 = 64
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SH_REG_XF8 = 65
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SH_REG_XF9 = 66
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SH_REG_XF10 = 67
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SH_REG_XF11 = 68
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SH_REG_XF12 = 69
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SH_REG_XF13 = 70
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SH_REG_XF14 = 71
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SH_REG_XF15 = 72
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SH_REG_FV0 = 73
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SH_REG_FV4 = 74
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SH_REG_FV8 = 75
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SH_REG_FV12 = 76
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SH_REG_XMATRX = 77
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SH_REG_PC = 78
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SH_REG_PR = 79
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SH_REG_MACH = 80
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SH_REG_MACL = 81
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SH_REG_SR = 82
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SH_REG_GBR = 83
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SH_REG_SSR = 84
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SH_REG_SPC = 85
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SH_REG_SGR = 86
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SH_REG_DBR = 87
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SH_REG_VBR = 88
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SH_REG_TBR = 89
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SH_REG_RS = 90
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SH_REG_RE = 91
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SH_REG_MOD = 92
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SH_REG_FPUL = 93
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SH_REG_FPSCR = 94
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SH_REG_DSP_X0 = 95
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SH_REG_DSP_X1 = 96
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SH_REG_DSP_Y0 = 97
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SH_REG_DSP_Y1 = 98
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SH_REG_DSP_A0 = 99
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SH_REG_DSP_A1 = 100
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SH_REG_DSP_A0G = 101
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SH_REG_DSP_A1G = 102
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SH_REG_DSP_M0 = 103
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SH_REG_DSP_M1 = 104
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SH_REG_DSP_DSR = 105
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SH_REG_DSP_RSV0 = 106
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SH_REG_DSP_RSV1 = 107
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SH_REG_DSP_RSV2 = 108
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SH_REG_DSP_RSV3 = 109
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SH_REG_DSP_RSV4 = 110
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SH_REG_DSP_RSV5 = 111
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SH_REG_DSP_RSV6 = 112
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SH_REG_DSP_RSV7 = 113
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SH_REG_DSP_RSV8 = 114
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SH_REG_DSP_RSV9 = 115
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SH_REG_DSP_RSVA = 116
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SH_REG_DSP_RSVB = 117
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SH_REG_DSP_RSVC = 118
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SH_REG_DSP_RSVD = 119
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SH_REG_DSP_RSVE = 120
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SH_REG_DSP_RSVF = 121
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SH_REG_ENDING = 122
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SH_OP_INVALID = 0
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SH_OP_REG = 1
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SH_OP_IMM = 2
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SH_OP_MEM = 3
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SH_OP_MEM_INVALID = 0
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SH_OP_MEM_REG_IND = 1
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SH_OP_MEM_REG_POST = 2
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SH_OP_MEM_REG_PRE = 3
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SH_OP_MEM_REG_DISP = 4
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SH_OP_MEM_REG_R0 = 5
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SH_OP_MEM_GBR_DISP = 6
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SH_OP_MEM_GBR_R0 = 7
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SH_OP_MEM_PCR = 8
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SH_OP_MEM_TBR_DISP = 9
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SH_INS_DSP_INVALID = 0
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SH_INS_DSP_DOUBLE = 1
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SH_INS_DSP_SINGLE = 2
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SH_INS_DSP_PARALLEL = 3
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SH_INS_DSP_NOP = 1
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SH_INS_DSP_MOV = 2
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SH_INS_DSP_PSHL = 3
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SH_INS_DSP_PSHA = 4
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SH_INS_DSP_PMULS = 5
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SH_INS_DSP_PCLR_PMULS = 6
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SH_INS_DSP_PSUB_PMULS = 7
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SH_INS_DSP_PADD_PMULS = 8
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SH_INS_DSP_PSUBC = 9
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SH_INS_DSP_PADDC = 10
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SH_INS_DSP_PCMP = 11
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SH_INS_DSP_PABS = 12
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SH_INS_DSP_PRND = 13
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SH_INS_DSP_PSUB = 14
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SH_INS_DSP_PSUBr = 15
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SH_INS_DSP_PADD = 16
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SH_INS_DSP_PAND = 17
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SH_INS_DSP_PXOR = 18
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SH_INS_DSP_POR = 19
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SH_INS_DSP_PDEC = 20
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SH_INS_DSP_PINC = 21
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SH_INS_DSP_PCLR = 22
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SH_INS_DSP_PDMSB = 23
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SH_INS_DSP_PNEG = 24
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SH_INS_DSP_PCOPY = 25
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SH_INS_DSP_PSTS = 26
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SH_INS_DSP_PLDS = 27
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SH_INS_DSP_PSWAP = 28
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SH_INS_DSP_PWAD = 29
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SH_INS_DSP_PWSB = 30
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SH_OP_DSP_INVALID = 0
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SH_OP_DSP_REG_PRE = 1
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SH_OP_DSP_REG_IND = 2
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SH_OP_DSP_REG_POST = 3
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SH_OP_DSP_REG_INDEX = 4
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SH_OP_DSP_REG = 5
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SH_OP_DSP_IMM = 6
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SH_DSP_CC_INVALID = 0
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SH_DSP_CC_NONE = 1
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SH_DSP_CC_DCT = 2
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SH_DSP_CC_DCF = 3
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SH_INS_INVALID = 0
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SH_INS_ADD_r = 1
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SH_INS_ADD = 2
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SH_INS_ADDC = 3
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SH_INS_ADDV = 4
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SH_INS_AND = 5
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SH_INS_BAND = 6
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SH_INS_BANDNOT = 7
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SH_INS_BCLR = 8
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SH_INS_BF = 9
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SH_INS_BF_S = 10
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SH_INS_BLD = 11
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SH_INS_BLDNOT = 12
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SH_INS_BOR = 13
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SH_INS_BORNOT = 14
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SH_INS_BRA = 15
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SH_INS_BRAF = 16
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SH_INS_BSET = 17
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SH_INS_BSR = 18
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SH_INS_BSRF = 19
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SH_INS_BST = 20
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SH_INS_BT = 21
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SH_INS_BT_S = 22
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SH_INS_BXOR = 23
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SH_INS_CLIPS = 24
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SH_INS_CLIPU = 25
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SH_INS_CLRDMXY = 26
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SH_INS_CLRMAC = 27
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SH_INS_CLRS = 28
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SH_INS_CLRT = 29
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SH_INS_CMP_EQ = 30
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SH_INS_CMP_GE = 31
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SH_INS_CMP_GT = 32
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SH_INS_CMP_HI = 33
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SH_INS_CMP_HS = 34
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SH_INS_CMP_PL = 35
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SH_INS_CMP_PZ = 36
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SH_INS_CMP_STR = 37
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SH_INS_DIV0S = 38
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SH_INS_DIV0U = 39
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SH_INS_DIV1 = 40
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SH_INS_DIVS = 41
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SH_INS_DIVU = 42
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SH_INS_DMULS_L = 43
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SH_INS_DMULU_L = 44
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SH_INS_DT = 45
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SH_INS_EXTS_B = 46
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SH_INS_EXTS_W = 47
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SH_INS_EXTU_B = 48
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SH_INS_EXTU_W = 49
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SH_INS_FABS = 50
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SH_INS_FADD = 51
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SH_INS_FCMP_EQ = 52
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SH_INS_FCMP_GT = 53
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SH_INS_FCNVDS = 54
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SH_INS_FCNVSD = 55
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SH_INS_FDIV = 56
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SH_INS_FIPR = 57
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SH_INS_FLDI0 = 58
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SH_INS_FLDI1 = 59
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SH_INS_FLDS = 60
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SH_INS_FLOAT = 61
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SH_INS_FMAC = 62
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SH_INS_FMOV = 63
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SH_INS_FMUL = 64
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SH_INS_FNEG = 65
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SH_INS_FPCHG = 66
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SH_INS_FRCHG = 67
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SH_INS_FSCA = 68
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SH_INS_FSCHG = 69
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SH_INS_FSQRT = 70
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SH_INS_FSRRA = 71
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SH_INS_FSTS = 72
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SH_INS_FSUB = 73
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SH_INS_FTRC = 74
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SH_INS_FTRV = 75
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SH_INS_ICBI = 76
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SH_INS_JMP = 77
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SH_INS_JSR = 78
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SH_INS_JSR_N = 79
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SH_INS_LDBANK = 80
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SH_INS_LDC = 81
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SH_INS_LDRC = 82
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SH_INS_LDRE = 83
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SH_INS_LDRS = 84
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SH_INS_LDS = 85
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SH_INS_LDTLB = 86
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SH_INS_MAC_L = 87
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SH_INS_MAC_W = 88
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SH_INS_MOV = 89
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SH_INS_MOVA = 90
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SH_INS_MOVCA = 91
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SH_INS_MOVCO = 92
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SH_INS_MOVI20 = 93
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SH_INS_MOVI20S = 94
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SH_INS_MOVLI = 95
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SH_INS_MOVML = 96
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SH_INS_MOVMU = 97
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SH_INS_MOVRT = 98
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SH_INS_MOVT = 99
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SH_INS_MOVU = 100
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SH_INS_MOVUA = 101
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SH_INS_MUL_L = 102
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SH_INS_MULR = 103
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SH_INS_MULS_W = 104
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SH_INS_MULU_W = 105
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SH_INS_NEG = 106
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SH_INS_NEGC = 107
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SH_INS_NOP = 108
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SH_INS_NOT = 109
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SH_INS_NOTT = 110
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SH_INS_OCBI = 111
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SH_INS_OCBP = 112
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SH_INS_OCBWB = 113
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SH_INS_OR = 114
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SH_INS_PREF = 115
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SH_INS_PREFI = 116
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SH_INS_RESBANK = 117
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SH_INS_ROTCL = 118
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SH_INS_ROTCR = 119
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SH_INS_ROTL = 120
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SH_INS_ROTR = 121
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SH_INS_RTE = 122
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SH_INS_RTS = 123
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SH_INS_RTS_N = 124
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SH_INS_RTV_N = 125
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SH_INS_SETDMX = 126
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SH_INS_SETDMY = 127
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SH_INS_SETRC = 128
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SH_INS_SETS = 129
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SH_INS_SETT = 130
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SH_INS_SHAD = 131
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SH_INS_SHAL = 132
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SH_INS_SHAR = 133
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SH_INS_SHLD = 134
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SH_INS_SHLL = 135
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SH_INS_SHLL16 = 136
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SH_INS_SHLL2 = 137
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SH_INS_SHLL8 = 138
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SH_INS_SHLR = 139
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SH_INS_SHLR16 = 140
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SH_INS_SHLR2 = 141
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SH_INS_SHLR8 = 142
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SH_INS_SLEEP = 143
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SH_INS_STBANK = 144
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SH_INS_STC = 145
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SH_INS_STS = 146
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SH_INS_SUB = 147
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SH_INS_SUBC = 148
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SH_INS_SUBV = 149
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SH_INS_SWAP_B = 150
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SH_INS_SWAP_W = 151
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SH_INS_SYNCO = 152
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SH_INS_TAS = 153
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SH_INS_TRAPA = 154
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SH_INS_TST = 155
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SH_INS_XOR = 156
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SH_INS_XTRCT = 157
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SH_INS_DSP = 158
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SH_INS_ENDING = 159
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SH_GRP_INVALID = 0
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SH_GRP_JUMP = 1
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SH_GRP_CALL = 2
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SH_GRP_INT = 3
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SH_GRP_RET = 4
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SH_GRP_IRET = 5
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SH_GRP_PRIVILEGE = 6
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SH_GRP_BRANCH_RELATIVE = 7
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SH_GRP_SH1 = 8
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SH_GRP_SH2 = 9
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SH_GRP_SH2E = 10
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SH_GRP_SH2DSP = 11
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SH_GRP_SH2A = 12
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SH_GRP_SH2AFPU = 13
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SH_GRP_SH3 = 14
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SH_GRP_SH3DSP = 15
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SH_GRP_SH4 = 16
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SH_GRP_SH4A = 17
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SH_GRP_ENDING = 18
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